Product Description

GFET-S11 (Die size 10 mm x 10 mm) - Processed in Clean Room Class 1000

The GFET-S11 chip from Graphenea provides 31 graphene devices with a van der Pauw (vdP) geometry, distributed in 3 different sizes. 3 vdPs have a 2x2mm2 footprint, 14 vdPs have a 500x500m2 footprint and 14 vdPs have a 125x125m2 footprint. These devices have an optimized geometry for 4-probe measurements in a vdP configuration. These varying graphene device dimensions allow investigation of geometry dependence on device properties, enabling immediate optimization.

TYPICAL SPECIFICATIONS

Growth method: CVD synthesis

Chip dimensions: 10 mm x 10 mm

Chip thickness: 675 m

Number of GFETs per chip:  31

Gate oxide thickness: 90 nm

Gate oxide material: SiO2

Dielectric Constant of the SiO2 layer: 3.9

Resistivity of substrate: 1-10 .cm

Metallization: Chromium/Gold 5/45nm

Graphene field-effect mobility: >1000 cm2/V.s

Dirac point: <50 V

Minimum working devices: >75 %

ABSOLUTE MAXIMUM RATINGS

Maximum gate-source voltage: 50 V

Maximum temperature rating: 150 C

Maximum drain-source current density 107A.cm-2