
GFET-S20 (Die size 10 mm x 10 mm) - Processed in Clean Room Class 1000
The GFET S-20 chip from Graphenea is designed for measurements in liquid medium. The new version provides 12 graphene devices, with encapsulation on the metal pads to avoid degradation and reduce leakage currents, and the probe pads located near the periphery of the chip. It also includes a non-encapsulated electrode at the center of the chip, which allows liquid gating without the need of an external gate electrode.
TYPICAL SPECIFICATIONS
Growth method: CVD synthesis
Chip dimensions: 10 mm x 10 mm
Chip thickness: 675 m
Number of GFETs per chip: 36
Gate oxide thickness: 90 nm
Gate oxide material: SiO2
Resistivity of substrate: 1-10 .cm
Metallization: Chromium/Gold-Palladium 2/50 nm
Graphene field-effect mobility: >1000 cm2/V.s
Encapsulation: 50 nm Al2O3 + 100 nm Si3N4
Dirac point (back gating): <50 V
Dirac point (liquid gating): <1V
Minimum working devices: >75 %
ABSOLUTE MAXIMUM RATINGS
Maximum gate-source voltage: 50 V
Maximum temperature rating: 150 C
Maximum drain-source current density 107A.cm-2
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